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oki semiconductor fedl6650digest-05 issue date: jan. 11, 2002 msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54-xx, msm66p56-xx , msm6650 internal mask rom voice synthesis ic, internal one-time-programmable (otp) rom voice synthesis ic, external rom drive voice synthesis ic 1/46 this document contains minimum specifications. for full specifications, please contact your nearest oki office or representative. general description the msm6650 family is the successor to oki?s msm6375 family. to ensure high-quality voice synthesis, the msm6650 family members offer adaptive differential pulse-code modulation (adpcm) playback, pulse-code modulation (pcm) playback, 12-bit d/a conversion, and on-chip ?40 db/octave low-pass filter (lpf). the conventional ?beep? tones and 2-channel playback are now easier to use. oki has added additional functions such as melody play, fade-out, and random playback. oki has improved external control by adding an edit rom. the edit rom can be used to form sentences by linking phrases. the msm6650 family members can support a variety of applications as it can function in either standalone mode or microcontroller interface mode. in microcontroller interface mode, serial input control is available. serial input control minimizes the number of microcontroller port pins required for voice synthesis control. the msm6650 family includes an internal mask rom version, internal one-time-programmable (otp) rom version, and external rom version. the features of the msm6650 family devices are as follows. ? msm6652/53/54/55/56-xxx these devices are single-chip voice synthesizers with an on-chip mask rom using the cmos technology. standalone mode or microcontroller interface mode can be selected by mask option. ? msm6652a/53a/54a/55a/56a/58a-xxx the trial production period for these devices is shorter than those described above. these devices are suitable for developing prototype models and concept demonstration of new products. ? msm66p54-xx, msm66p56-xx the device is a single-chip cmos voice synthesizer with one-time-programmable (otp) rom. standalone and microcontroller interface modes are selected by using a code (01-04). the user can easily write voice data using the development tool ar761 or ar762, or p54 adapter. unlike the mask rom version, the otp version is suited to applications which requires a small lot production of different type devices or short delivery time. ? msm6650 the msm6650 device can directly connect external rom or eprom of up to 64 mbits, which stores voice data. this device is ideally suited to an evaluation ic for the msm6650 family because its circuit configuration is identical to those of the mask rom-based and otp version devices.
fedl6650digest-05 oki semiconductor msm6650 family 2/46 ? option table microcontroller interface mode standalone mode pin name serial input parallel input with standby no standby msm6652/53/54/55/56 msm6652a/53a/54a/ 55a/56a/58a ? mask option msm66p54/p56 ? ?01 ?02 ?03 ?04 cpu ?h? ?h? ?l? ?l? serial ?h? ?l? ?l? ?l? msm6650 stby ???l??h? *1. the options for the mask rom-based devices are mask options. the user should send oki an option list before starting development. a sample of option list is shown below. *2. a code of otp version device corresponds to one of the options. the user should specify either msm66p54-03 or msm66p54-04 or msm66p56-03 or msm66p56-04. (in this case, no option list is required.) *1 *2 option input interface mode standby conversion option a option b option c option d microcontroller standalone microcontroller standalone serial parallel ? ? ? ? yes no item ceramic sample mold sample mass produc- tion package (circle the desired one) quantity note 18-pin dip (ceramic) 18-pin dip (plastic) 18-pin dip (plastic) 24-pin sop (ceramic) 24-pin sop (plastic) 24-pin sop (plastic) chip chip chip pcs pcs pcs per lot monthly up to 10 samples. operating temp. : 10 to 30c up to 50 samples option list oki electric industry co., ltd. date: you are requested to develop msm665x-xxx on the following conditions. 1. options there are four options for the msm6650 family. choose and circle the desired option. 2. package and quantity signed by title : company name :
fedl6650digest-05 oki semiconductor msm6650 family 3/46 standalone mode features maximum playback time (sec) device name rom size f sam = 4.0 khz f sam = 6.4 khz f sam = 8.0 khz f sam = 16 khz msm6652, 6652a 288 kbits 16.9 10.5 8.4 4.2 msm6653, 6653a 544 kbits 31.2 19.5 15.6 7.8 msm6654, 6654a 1 mbit 63.8 39.9 31.9 15.9 msm6655, 6655a 1.5 mbits 96.5 60.3 48.2 24.1 msm6656, 6656a 2 mbits 129.1 80.7 64.5 32.2 msm6658a 4 mbits 259.7 162.9 129.8 64.9 msm66p54 1 mbit 63.8 39.9 31.9 15.9 msm66p56 2 mbit 129.1 80.7 64.5 32.2 msm6650 64 mbits (max) 4194.3 2620.5 2096.4 1048.2 note: actual voice rom area is smaller by 22 kbits. ? 4-bit adpcm or 8-bit pcm sound generation ? melody function ? edit rom function ? two-channel mixing function ? built-in random playback function ? fade-out function via four-step sound volume attenuation ? built-in beep tone of 0.5 khz, 1.0 khz, 1.3 khz, or 2.0 khz selectable with a specific code ? sampling frequency of 4.0 khz, 5.3 khz, 6.4 khz, 8.0 khz, 10.6 khz, 12.8 khz, 16.0 khz, or 32.0 khz (32 khz sampling is not possible when using rc oscillation) ? up to 120 phrases ? built-in 12-bit d/a converter ? built-in ?40 db/octave low-pass filter ? standby function ? selectable rc or ceramic oscillation ? package options: 18-pin plastic dip (dip18-p-300-2.54) (product name: msm6652-xxxrs/msm6653-xxxrs/ msm6654-xxxrs/msm6655-xxxrs/ msm6656-xxxrs/msm6652a-xxxrs/ msm6653a-xxxrs/msm6654a-xxxrs/ msm6655a-xxxrs/msm6656a-xxxrs/ msm6658a-xxxrs) 24-pin plastic sop (sop24-p-430-1.27-k) (product name: msm6652-xxxgs-k/msm6653-xxxgs-k/ msm6654-xxxgs-k/msm6655-xxxgs-k/ msm6656-xxxgs-k/msm6652a-xxxgs-k/ msm6653a-xxxgs-k/msm6654a-xxxgs-k/ msm6655a-xxxgs-k/msm6656a-xxxgs-k/ msm6658a-xxxgs-k/msm66p54-03gs-k/ msm66p54-04gs-k/msm66p56-03gs-k/ msm66p56-04gs-k) 20-pin plastic dip (dip20-p-300-2.54-w1) (product name: msm66p54-03rs/msm66p54-04rs/ msm66p56-03rs/msm66p56-04rs) 64-pin plastic qfp (qfp64-p-1420-1.00-bk) (product name: msm6650gs-bk) 64-pin plastic sdip (sdip64-p-750-1.778) (product name: MSM6650SS)
fedl6650digest-05 oki semiconductor msm6650 family 4/46 block diagrams msm6652/53/54/55/56-xxx msm6652a/53a/54a/55a/56a/58a-xxx (containing 22 kbit phrase control 16 bit (msm6652/52a) 17 bit (msm6653/53a) 17 bit (msm6654/54a) 18 bit (msm6655/55a) 18 bit (msm6656/56a) 19 bit (msm6658a) multiplexer address & switching controller 7 adpcm synthesizer pcm synthesizer 12 8 12 bit dac lpf aout data controller melody generator beep tone generator 16 bit (msm6652/52a) 17 bit (msm6653/53a) 17 bit (msm6654/54a) 18 bit (msm6655/55a) 18 bit (msm6656/56a) 19 bit (msm6658a) address counter timing controller gnd v dd reset random circuit i/o interface osc ceramic/ cr y stal/rc xt/ cr a0 a1 a2 sw0 sw1 sw2 sw3 test rnd busy osc1 osc2 osc3 (msm6652/52a) (msm6653/53a) (msm6654/54a) (msm6655/55a) (msm6656/56a) (msm6658a) 288 kbit 544 kbit 1 mbit 1.5 mbit 2 mbit 4 mbit rom table & phrase address table)
fedl6650digest-05 oki semiconductor msm6650 family 5/46 msm66p54/p56-xx pgm v pp osc (ceramic/ crystal/rc) 17 bit (msm66p54-xx) 18 bit (msm66p56-xx) multiplexer 17 bit (msm66p54-xx) 18 bit (msm66p56-xx) address counter program circuit 1 mbit otp rom (msm66p54-xx) 2 mbit otp rom (msm66p56-xx) (containing 22 kbit phrase control table & phrase address table) address & switching controller 7 adpcm synthesizer pcm synthesizer 12 8 12 bit dac lpf aout data controller melody generator beep tone generator timing controller gnd v dd reset random circuit i/o interface xt/ cr a0 a1 a2 sw0 sw2 sw3 test rnd busy osc1 osc2 osc3 sw1
fedl6650digest-05 oki semiconductor msm6650 family 6/46 msm6650 8 bit latch 23 bit multiplexer address & switching controller 7 adpcm synthesizer pcm synthesizer 12 8 12 bit dac lpf aout data controller melody generator beep tone generator 23 bit address counter timing controller dgnd dv dd reset random circuit i/o interface osc ( ceramic/ crystal/rc) xt/ cr a2 a1 a0 sw3 sw2 sw1 sw0 test1, 3 rnd ce rcs busy nar ibusy standby xt/osc1 xt /osc2 osc3 av dd agnd test2 cpu stby ra22 ra0 d7 d0
fedl6650digest-05 oki semiconductor msm6650 family 7/46 pin configuration (top view) the msm66p54-xx and msm66p56-xx has two more pins than the msm6652-6658a while their pin configurations are identical. the additional two pins (v pp , pgm ) of the msm66p54-xx/p56-xx may be open at playback after completion of writing. sm6652-xxxgs-k, msm6653-xxxgs-k, sm66p54-03/-04gs-k msm6654-xxxgs-k, msm6655-xxxgs-k, msm66p56-03/-04gs-k msm6656-xxxgs-k, msm6652a-xxxgs-k, msm6653a-xxxgs-k, msm6654a-xxxgs-k, msm6655a-xxxgs-k, msm6656a-xxxgs-k, msm6658a-xxxgs-k msm6652-xxxrs, msm6653-xxxrs, msm6654-xxxrs, msm66p54-03/-04rs msm6655-xxxrs, msm6656-xxxrs, msm6652a-xxxrs, msm66p56-03/-04rs msm6653a-xxxrs, msm6654a-xxxrs, msm6655a-xxxrs, msm6656a-xxxrs, msm6658a-xxxrs 18-pin plastic dip 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 test a2 a1 a0 reset xt/ cr aout sw3 sw2 sw1 sw0 rnd osc3 osc2 osc1 msm6652-6658a ( mask rom ) 24-pin plastic sop 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 v dd osc1 osc2 nc osc3 nc nc rnd sw0 sw1 sw2 sw3 gnd aout xt/ cr nc busy nc nc reset test a2 a1 a0 busy gnd v dd msm6652-6658a ( mask rom ) 20-pin plastic dip 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 test a2 a1 a0 v pp reset busy xt/ cr aout gnd pgm sw3 sw2 sw1 sw0 rnd osc3 osc2 osc1 v dd msm66p54/p56 ( otp ) 24-pin plastic sop 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 v dd osc1 osc2 nc osc3 nc pgm rnd sw0 sw1 sw2 sw3 gnd aout xt/ cr nc busy nc v pp reset test a2 a1 a0 msm66p54/p56 ( otp )
fedl6650digest-05 oki semiconductor msm6650 family 8/46 msm6650 product name: msm6650gs-bk nc: no connection 64-pin plastic qfp 1 nc busy nar nc aout agnd dgnd av dd dv dd xt/osc1 xt /osc2 osc3 test1 rnd xt/ cr cpu test2 ibusy nc ra10 ra9 ra8 ra7 ra6 ra5 ra4 ra3 ra2 ra1 ra0 d7 d6 d5 d4 d3 d2 d1 nc stby ra22 ra21 ra20 ra19 ra18 ra17 ra16 ra15 ra14 ra13 ra12 ra11 standby sw0 sw1 sw2 sw3 a0 a1 a2 test3 reset ce rcs d0 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
fedl6650digest-05 oki semiconductor msm6650 family 9/46 product name: MSM6650SS nc: no connection 64-pin plastic sdip 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 ce xt /osc2 osc3 test1 rnd xt/ cr cpu test2 ibusy nc standby sw0 sw1 sw2 sw3 a0 a1 a2 test3 reset ra13 xt/osc1 dv dd av dd dgnd agnd aout nar busy nc stby ra22 ra21 ra20 ra19 ra18 ra17 ra16 ra15 ra14 45 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 21 22 23 24 25 26 27 28 29 30 31 32 44 43 42 41 40 39 38 37 36 35 34 33 rcs ra12 d0 ra11 nc ra10 d1 nc d2 ra9 d3 ra8 d4 ra7 d5 ra6 d6 ra5 d7 ra4 ra0 ra3 ra1 ra2
fedl6650digest-05 oki semiconductor msm6650 family 10/46 pin descriptions 1. msm6652/53/54/55/56- xxx, msm6 652a/53a/54a/55a/56a/58a-xxx 18-pin plastic dip pin symbol type description 5 reset i reset. setting this pin to ?l? puts the lsi in standby status. at this time, oscillation stops, aout is pulled to gnd, and the deveice is initialized. this pin has an internal pull-up resistor. 6 busy o busy. this pin outputs a ?l? level during playback. at power-on, this pin is at ?h? level. 7xt/ cr i xt/ cr selectable pin. set to ?h? level when using ceramic oscillation. set to ?l? level when using rc oscillation. 8 aout o sound output. this is the synthesized output pin of the internal low-pass filter. 11 osc1 i oscillator 1. this pin is a ceramic oscillator connection pin when using ceramic oscillation. this pin is an rc connection pin when using rc oscillation. when using an external clock, use this pin as the clock input. 12 osc2 o oscillator 2. this pin is a ceramic oscillator connection pin when using a ceramic oscillator. this is an rc connection pin when using rc oscillation. leave open if using an external clock. osc2 outputs a ?l? level in standby status. 13 osc3 o oscillator 3. leave open if using a ceramic oscillator. this pin is the rc connection pin when using rc oscillation. when rc oscillation is selected, osc3 outputs a ?h? level in standby status. 14 rnd i random playback. random playback starts when the rnd pin is set to a ?l? level. at the fall of rnd , addresses from the random address playback circuit inside the ic are fetched. set to a ?h? level if random playback is not used. this pin has an internal pull-up resistor. 15-18 sw0-sw3 i phrase inputs. these pins are phrase input pins corresponding to playback. if the input changes, sw0 to sw3 pins capture address data after 16 ms and speech playback commences. these pins have internal pull-down resistors. 1-3 a0-a2 i phrase inputs. phrase input pins correspoding to playback. the a0 input becomes invalid when the random playback function is used. 9 gnd ? ground. 10 v dd ? power supply. insert a 0.1 f or more bypass capacitor between this pin and gnd. 4 test i test mode. set to ?h? level. this pin has an internal pull-up resistor
fedl6650digest-05 oki semiconductor msm6650 family 11/46 2. msm66p54-xx, msm66p56-xx 20-pin plastic dip pin symbol type description 6 reset i reset. setting this pin to ?l? puts the lsi in standby status. at this time, oscillation stops, aout is pulled to gnd, and the deveice is initialized. this pin has an internal pull-up resistor. 7 busy o busy. this pin outputs a ?l? level during playback. at power-on, this pin is at ?h? level. 8xt/ cr i xt/ cr selectable pin. set to ?h? level when using ceramic oscillation. set to ?l? level when using rc oscillation. 9 aout o sound output. this is the synthesized output pin of the internal low-pass filter. 12 osc1 i oscillator 1. this pin is a ceramic oscillator connection pin when using ceramic oscillation. this pin is an rc connection pin when using rc oscillation. when using an external clock, use this pin as the clock input. 13 osc2 o oscillator 2. this pin is a ceramic oscillator connection pin when using a ceramic oscillator. this is an rc connection pin when using rc oscillation. leave open if using an external clock. osc2 outputs a ?l? level in standby status. 14 osc3 o oscillator 3. leave open if using a ceramic oscillator. this pin is the rc connection pin when using rc oscillation. when rc oscillation is selected, osc3 outputs a ?h? level in standby status. 15 rnd i random playback. random playback starts when the rnd pin is set to a ?l? level. at the fall of rnd , addresses from the random address playback circuit inside the ic are fetched. set to a ?h? level if random playback is not used. this pin has an internal pull-up resistor. 16-19 sw0-sw3 i phrase inputs. these pins are phrase input pins corresponding to playback. if the input changes, sw0 to sw3 pins capture address data after 16 ms and speech playback commences. these pins have internal pull-down resistors. 2-4 a0-a2 i phrase inputs. phrase input pins correspoding to playback. the a0 input becomes invalid when the random playback function is used. 10 gnd ? ground. 11 v dd ? power supply. insert a 0.1 f or more bypass capacitor between this pin and gnd. 5 test i test mode. set to ?h? level. this pin has an internal pull-up resistor. 1v pp ? power supply used when writing data to internal otp rom. leave open or set to ?h? level during playback. 20 pgm i interface with voice analysis edit tool ar203 or ar204. set to ?l? level or leave open during playback.
fedl6650digest-05 oki semiconductor msm6650 family 12/46 3. msm6652/53/54/55/56- xxx, msm6 652a/53a/54a/55a/56a/58a- xxx, msm66p54-xx, msm66p56-xx 24-pin plastic sop pin symbol type description 17 reset i reset. setting this pin to ?l? puts the lsi in standby status. at this time, oscillation stops, aout is pulled to gnd, and the deveice is initialized. this pin has an internal pull-up resistor. 20 busy o busy. this pin outputs a ?l? level during playback. at power-on, this pin is at ?h? level. 22 xt/ cr i xt/ cr selectable pin. set to ?h? level when using ceramic oscillation. set to ?l? level when using rc oscillation. 23 aout o sound output. this is the synthesized output pin of the internal low-pass filter. 2osc1i oscillator 1. this pin is a ceramic oscillator connection pin when using ceramic oscillation. this pin is an rc connection pin when using rc oscillation. when using an external clock, use this pin as the clock input. 3osc2o oscillator 2. this pin is a ceramic oscillator connection pin when using a ceramic oscillator. this is an rc connection pin when using rc oscillation. leave open if using an external clock. osc2 outputs a ?l? level in standby status. 5osc3o oscillator 3. leave open if using a ceramic oscillator. this pin is the rc connection pin when using rc oscillation. when rc oscillation is selected, osc3 outputs a ?h? level in standby status. 8 rnd i random playback. random playback starts when the rnd pin is set to a ?l? level. at the fall of rnd , addresses from the random address playback circuit inside the ic are fetched. set to a ?h? level if random playback is not used. this pin has an internal pull-up resistor. 9-12 sw0-sw3 i phrase inputs. these pins are phrase input pins corresponding to playback. if the input changes, sw0 to sw3 pins capture address data after 16 ms and speech playback commences. these pins have internal pull-down resistors. 13-15 a0-a2 i phrase inputs. phrase input pins correspoding to playback. the a0 input becomes invalid when the random playback function is used. 24 gnd ? ground. 1v dd ? power supply. insert a 0.1 f or more bypass capacitor between this pin and gnd. 16 test i test mode. set to ?h? level. this pin has an internal pull-up resistor. 18 v pp *? power supply used when writing data to internal otp rom. leave pen or set to ?h? level during playback. 7 pgm *i interface with voice analysis edit tool ar203 or ar204. set to ?l? level or leave open during playback. * pins for msm66p54/56-xx only
fedl6650digest-05 oki semiconductor msm6650 family 13/46 4. msm6650 64-pin plastic qfp (64-pin plastic sdip) pin symbol type description 29 (19) reset i reset. setting this pin to ?l? puts the lsi in standby status. at this time, oscillation stops, aout is pulled to gnd, and the deveice is initialized. this pin has an internal pull-up resistor. 3 (57) busy o busy. this pin outputs a ?l? level during playback. at power-on, this pin is at ?h? level. 15 (5) xt/ cr i xt/ cr selectable pin. set to ?h? level when using ceramic oscillation. set to ?l? level when using rc oscillation. 5 (59) aout o sound output. this is the synthesized output pin of the internal low-pass filter. 10 (64) xt/osc1 i oscillator 1. this pin is a ceramic oscillator connection pin when using ceramic oscillation. this pin is an rc connection pin when using rc oscillation. when using an external clock, use this pin as the clock input. 11 (1) xt /osc2 o oscillator 2. this pin is a ceramic oscillator connection pin when using a ceramic oscillator. this is an rc connection pin when using rc oscillation. leave open if using an external clock. osc2 outputs a ?l? level in standby status. 12 (2) osc3 o oscillator 3. leave open if using a ceramic oscillator. this pin is the rc connection pin when using rc oscillation. when rc oscillation is selected, osc3 outputs a ?h? level in standby status. 14 (4) rnd i random playback. random playback starts when the rnd pin is set to a ?l? level. at the fall of rnd , addresses from the random address playback circuit inside the ic are fetched. set to a ?h? level if random playback is not used. this pin has an internal pull-up resistor. 21-24 (11-14) sw0-sw3 i phrase inputs. these pins are phrase input pins corresponding to playback. if the input changes, sw0 to sw3 pins capture address data after 16 ms and speech playback commences. these pins have internal pull-down resistors. 25-27 (15-17) a0-a2 i phrase inputs. phrase input pins correspoding to playback. the a0 input becomes invalid when the random playback function is used.
fedl6650digest-05 oki semiconductor msm6650 family 14/46 pin symbol type description 6 (60) agnd ? analog ground pin. 7 (61) dgnd ? digital ground pin. 8 (62) av dd ? analog power pin. insert a 0.1 f or more bypass capacitor in between this pin and agnd. 9 (63) dv dd ? digital power pin. insert a 0.1 f or more bypass capacitor in between this pin and dgnd. 16 (6) cpu i cpu mode. set to ?l? level to select standalone mode. set to ?h? level to select microcontroller interface mode. 13, 28 (3, 18) test1 , 3 i test. set these pins to ?h? level. the test1 and test3 pins have internal pull-up resistor. 17 (7) test2 i test set this pin to ?l? level. 18 (8) ibusy o l busy. outputs a ?l? level during voice playback (except during standby conversion time), or when the aout pin is at half v dd level. 20 (10) standby o standby indicator. this output pin remains at ?l? level during oscillation. 30 (20) ce o chip enable. ce is a timing output pin to control read of external memory. this pin outputs when rcs is at the ?l? level. this pin outputs ?h? level when rcs is at the ?h? level. 31 (21) rcs i read chip select. the data bits d0-d7 are internally pulled down when rcs is high. addresses and ce are output when rcs is at ?l? level. the ra22-ra0 address pins become high impedance and ce pin outputs ?h? level when rcs is at the ?h? level. 32 34-40 (22, 24- 30) d0-d7 i external memory data bus. data is input when rcs is low when rcs is high, these pins become low due to internal pull-down resistors. 41-63 (31-40, 42-54) ra0-ra22 o external memory address. these are address pins for an external memory output when rcs is low. these pins become high impedance status if rcs is in ?h? level. 64 (55) stby i standby contorl. if set to ?l? level, the msm6650 enters standby mode 0.2 seconds after voice ends. if set to ?h? level, the msm6650 aout output maintains half v dd after voice ends.
fedl6650digest-05 oki semiconductor msm6650 family 15/46 absolute maximum ratings (gnd = 0 v) parameter symbol condition rating unit power supply voltage v dd ?0.3 to +7.0 v input voltage v in ta = 25c ?0.3 to v dd + 0.3 v storage temperature t stg ? ?55 to +150 c recommended operating conditions (gnd = 0 v) parameter symbol condition range unit v dd msm6652-56, msm6650, msm6652a-56a 2.4 to 5.5 v power supply voltage v dd msm6658a, msm66p54/p56 3.5 to 5.5 v operating temperature t op ? ?40 to +85 c min. typ. max. master clock frequency 1 f osc1 when crystal selected 3.5 4.096 4.5 mhz master clock frequency 2 f osc2 when rc selected (*) 200 256 300 khz * if rc oscillation is selected, 32 khz sampling frequency cannot be selected.
fedl6650digest-05 oki semiconductor msm6650 family 16/46 electrical characteristics dc characteristics (v dd = 5.0 v, gnd = 0 v, ta = ?40 to +85c) parameter symbol condition min. typ. max. unit ?h? input voltage v ih ?4.2??v ?l? input voltage v il ???0.8v ?h? output voltage v oh l oh = ?1 ma 4.6 ? ? v ?l? output voltage v ol l ol = 2 ma ? ? 0.4 v ?h? input current 1 l ih1 v ih = v dd ??10 a ?h? input current 2 l ih2 internal pull-down resistance 30 90 200 a ?l? input current 1 l il1 v il = gnd ?10 ? ? a ?l? input current 2 (note) l il2 internal pull-up resistance ?200 ?90 ?30 a operating power consumption i dd ??610ma ta = ?40c to +50c ? ? 10 a standby power consumption l ds ta = ?40c to +85c ? ? 30 a dc characteristics (v dd = 3.1 v, gnd = 0 v, ta = ?40 to +85c) parameter symbol condition min. typ. max. unit ?h? input voltage v ih ?2.7??v ?l? input voltage v il ???0.5v ?h? output voltage v oh l oh = ?1 ma 2.6 ? ? v ?l? output voltage v ol l ol = 2 ma ? ? 0.4 v ?h? input current 1 l ih1 v ih = v dd ??10 a ?h? input current 2 l ih2 internal pull-down resistance 10 30 100 a ?l? input current 1 l il1 v il = gnd ?10 ? ? a ?l? input current 2 l il2 internal pull-up resistance ?100 ?30 ?10 a operating power consumption i dd ??47ma ta = ?40c to +50c ? ? 5 a standby power consumption l ds ta = ?40c to +85c ? ? 20 a lpf driving resistance r aout when lpf output is selected 50 ? ? k ? lpf output impedance r lpf i f = 100 a?13k ?
fedl6650digest-05 oki semiconductor msm6650 family 17/46 application circuits (msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54/p56-xx) application circuit in standalone mode supporting 15 switch-selected phrases 123456789 10 11 12 13 14 15 sw0 sw1 sw2 sw3 aout v dd xt/ cr test rnd a0 a1 a2 gnd osc3 osc2 osc1 msm6652/53/54/55/56 msm6652a/53a/54a/55a/56a/58a msm66p54/p56
fedl6650digest-05 oki semiconductor msm6650 family 18/46 (msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54/p56-xx) application circuit in standalone mode supporting four switch-selected words switches and playback addresses a2 a1 a0 sw3 sw2 sw1 sw0 adr s1000000101 s2000001002 s3000010004 s4000100008 sw0 aout v dd test rnd gnd osc3 osc2 osc1 sw1 sw2 sw3 xt/ cr a 0 a1 a2 msm6652/53/54/55/56 msm6652a/53a/54a/55a/56a/58a msm66p54/p56 s4 s3 s2 s1 v dd
fedl6650digest-05 oki semiconductor msm6650 family 19/46 (msm6650) application circuit in standalone mode supporting 15 switch-selected phrases 12 3456789 10 11 12 13 14 15 sw0 sw1 sw2 sw3 ra15 dv dd xt/ cr test1, 3 rnd a0 a1 a2 dgnd osc3 osc2 osc1 aout ra0 v cc gnd v pp ce a15 a0 d7 o7 d0 o0 ce oe msm6650 msm27c512 av dd agnd
fedl6650digest-05 oki semiconductor msm6650 family 20/46 (msm6650) application circuit in standalone mode supporting four 1 mbit eproms sw0 sw1 sw2 sw3 ra18 dv dd xt/ cr test2 rnd a0 a1 a2 dgnd osc3 osc2 osc1 aout ra0 v dd gnd v pp ce a16 a0 d7 o7 d0 o0 oe msm6650 msm27c101 ra17 ra16 ce 2 g 1b 1 g 1y3 1 y2 1 y1 1 y0 1a 74hc139 cpu test3 test1 stby v dd gnd v pp ce a16 a0 o7 o0 oe msm27c101 v dd gnd v pp ce a16 a0 o7 o0 oe msm27c101 v dd gnd v pp ce a16 a0 o7 o0 oe msm27c101 agnd av dd
fedl6650digest-05 oki semiconductor msm6650 family 21/46 microcontroller interface mode features maximum playback time (sec) device name data rom size f sam = 4.0 khz f sam = 6.4 khz f sam = 8.0 khz f sam = 16 khz f sam = 32 khz msm6652, 6652a 288 kbits 16.9 10.5 8.4 4.2 2.1 msm6653, 6653a 544 kbits 31.2 19.5 15.6 7.8 3.9 msm6654, 6654a 1 mbit 63.8 39.9 31.9 15.9 7.9 msm6655, 6655a 1.5 mbits 96.5 60.3 48.2 24.1 12.0 msm6656, 6656a 2 mbits 129.1 80.7 64.5 32.2 16.1 msm6658a 4 mbits 259.7 162.9 129.8 64.9 32.4 msm66p54 1 mbit 63.8 39.9 31.9 15.9 7.9 msm66p56 2 mbit 129.1 80.7 64.5 32.2 16.1 msm6650 64 mbits (max) 4194.3 2620.5 2096.4 1048.2 524.1 note: actual voice rom area is smaller by 22 kbits. ? 4-bit adpcm or 8-bit pcm sound generation ? melody function ? edit rom function ? two-channel mixing function ? fade-out function via four-step sound volume attenuation ? serial input or parallel input selectable ? built-in beep tone of 0.5 khz, 1.0 khz, 1.3 khz, or 2.0 khz selectable with a specific code ? sampling frequency of 4.0 khz, 5.3 khz, 6.4 khz, 8.0 khz, 10.6 khz, 12.8 khz, 16.0 khz, or 32.0 khz (32 khz sampling is not possible when using rc oscillation) ? up to 127 phrases ? built-in 12-bit d/a converter ? built-in ?40 db/octave low-pass filter ? standby function ? package options: 18-pin plastic dip (dip18-p-300-2.54) (product name: msm6652-xxxrs/msm6653-xxxrs/ msm6654-xxxrs/msm6655-xxxrs/ msm6656-xxxrs/msm6652a-xxxrs/ msm6653a-xxxrs/msm6654a-xxxrs/ msm6655a-xxxrs/msm6656a-xxxrs/ msm6658a-xxxrs) 24-pin plastic sop (sop24-p-430-1.27-k) (product name: msm6652-xxxgs-k/msm6653-xxxgs-k/ msm6654-xxxgs-k/msm6655-xxxgs-k/ msm6656-xxxgs-k/msm6652a-xxxgs-k/ msm6653a-xxxgs-k/msm6654a-xxxgs-k/ msm6655a-xxxgs-k/msm6656a-xxxgs-k/ msm6658a-xxxgs-k/msm66p54-01gs-k/ msm66p54-02gs-k/msm66p56-01gs-k/ msm66p56-02gs-k) 20-pin plastic dip (dip20-p-300-2.54-w1) (product name: msm66p54-01rs/msm66p54-02rs/ msm66p56-01rs/msm66p56-02rs) 64-pin plastic qfp (qfp64-p-1420-1.00-bk) (product name:msm6650gs-bk) 64-pin plastic sdip (sdip64-p-750-1.778) (product name: MSM6650SS)
fedl6650digest-05 oki semiconductor msm6650 family 22/46 block diagrams msm6652/53/54/55/56-xxx msm6652a/53a/54a/55a/56a/58a-xxx 19-bit (msm6658a) 18-bit (msm6655/55a) 17-bit (msm6653/53a) 19-bit (msm6658a) 18-bit (msm6655/55a) 17-bit (msm6653/53a) 544-kbit (msm6653/53a) 1.5-mbit (msm6655/55a) 4-mbit (msm6658a) osc multiplexer 16-bit (msm6652/52a) address counter (containing 22-kbit phrase control table & phrase address table) address & command controller 7 adpcm synthesizer pcm synthesizer 12 8 12-bit dac lpf aout data controller melody generator beep tone generator timing controller gnd v dd reset i/o interface xt xt nar busy cmd st ch i0 i1 i2/port0 i3/port1 i4 i6/sd i5/si 17-bit (msm6654/54a) 18-bit (msm6656/56a) 16-bit (msm6652/52a) 17-bit (msm6654/54a) 18-bit (msm6656/56a) 288-kbit (msm6652/52a) 1-mbit (msm6654/54a) 2-mbit (msm6656/56a)
fedl6650digest-05 oki semiconductor msm6650 family 23/46 msm66p54/p56-xx pgm v pp osc 17-bit (msm66p54-xx) 18-bit (msm66p56-xx) multiplexer 17-bit (msm66p54-xx) 18-bit (msm66p56-xx) address counter program circuit 1-mbit otp rom (msm66p54-xx) 2-mbit otp rom (msm66p56-xx) (containing 22-kbit phrase control table & phrase address table) address & command controller 7 adpcm synthesizer p c m synthesizer 12 8 12-bit da c lpf aout data controller melody generator beep tone generator timing controller gnd v dd reset i/o interface xt xt nar busy cmd st ch i0 i1 i2/port0 i3/port1 i4 i5/si i6/sd
fedl6650digest-05 oki semiconductor msm6650 family 24/46 msm6650 8-bit latch 23-bit multiplexer address & switching controller 7 adpcm synthesizer pcm synthesizer 12 8 12-bit dac lpf aout data controller melody generator beep tone generator 23-bit address counter timing controller dgnd dv dd reset i/o interface osc test1 i6/sd i5/si i4 i3/port1 i2/port0 i1 i0 ch ce rcs busy nar ibusy standby xt xt mck av dd agnd serial cpu test2 ra22 ra0 d7 d0 st cmd
fedl6650digest-05 oki semiconductor msm6650 family 25/46 pin configuration (top view) the msm66p54/p56-xx has two more pins than the msm6652-6658a while their pin configurations are identical. the additional two pins (v pp , pgm ) of the msm66p54/p56-xx may be open at playback after completion of writing. msm6652-xxxrs, msm6653-xxxrs, msm6654-xxxrs, msm66p54-01/-02rs msm6655-xxxrs, msm6656-xxxrs, msm6652a-xxxrs, msm66p56-01/-02rs msm6653a-xxxrs, msm6654a-xxxrs, msm6655a-xxxrs, msm6656a-xxxrs, msm6658a-xxxrs msm6652-xxxgs-k, msm6653-xxxgs-k, msm66p54-01/-02gs-k msm6654-xxxgs-k, msm6655-xxxgs-k, msm66p56-01/-02gs-k msm6656-xxxgs-k, msm6652a-xxxgs-k, msm6653a-xxxgs-k, msm6654a-xxxgs-k, msm6655a-xxxgs-k, msm6656a-xxxgs-k, msm6658a-xxxgs-k 18-pin plastic dip 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 ch i6/sd i5/si i4 reset nar aout i3/port1 i2/port0 i1 i0 st cmd xt xt msm6652-6658a (mask rom) 24-pin plastic sop 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 v dd xt xt nc cmd nc nc st i0 i1 i2/port0 i3/port1 gnd aout nar nc busy nc nc reset ch i6/sd i5/si i4 busy gnd v dd msm6652-6658a (mask rom) 20-pin plastic dip 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 ch i6/sd i5/si i4 v pp reset busy nar aout gnd pgm i3/port1 i2/port0 i1 i0 st cmd xt xt v dd msm66p54/p56 (otp) 24-pin plastic sop 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 v dd xt xt nc cmd nc pgm st i0 i1 i2/port0 i3/port1 gnd aout nar nc busy nc v pp reset ch i6/sd i5/si i4 msm66p54/p56 (otp)
fedl6650digest-05 oki semiconductor msm6650 family 26/46 msm6650 product name: msm6650gs-bk nc: no connection 64-pin plastic qfp 1 nc busy nar nc aout agnd dgnd av dd dv dd xt xt mck cmd st test1 cpu serial ibusy nc ra10 ra9 ra8 ra7 ra6 ra5 ra4 ra3 ra2 ra1 ra0 d7 d6 d5 d4 d3 d2 d1 nc test2 ra22 ra21 ra20 ra19 ra18 ra17 ra16 ra15 ra14 ra13 ra12 ra11 standby i0 i1 i2/port0 i3/port1 i4 i5/si i6/sd ch reset ce rcs d0 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
fedl6650digest-05 oki semiconductor msm6650 family 27/46 product name: MSM6650SS nc: no connection 64-pin plastic sdip 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 ce xt mck cmd st test1 cpu serial ibusy nc standby i0 i1 i2/port0 i3/port1 i4 i5/si i6/sd ch reset ra13 xt dv dd av dd dgnd agnd aout nar busy nc test2 ra22 ra21 ra20 ra19 ra18 ra17 ra16 ra15 ra14 45 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 21 22 23 24 25 26 27 28 29 30 31 32 44 43 42 41 40 39 38 37 36 35 34 33 rcs ra12 d0 ra11 nc ra10 d1 nc d2 ra9 d3 ra8 d4 ra7 d5 ra6 d6 ra5 d7 ra4 ra0 ra3 ra1 ra2
fedl6650digest-05 oki semiconductor msm6650 family 28/46 pin descriptions 1. msm6652/53/54/55/56- xxx, msm6 652a/53a/54a/55a/56a/58a-xxx 18-pin plastic dip pin symbol type description 5 reset i reset. the devices enter stanby status when a low level is input to this pin. when reset, oscillation stops the aout output goes to ground and the ic status is reinitialzed. this pin has an internal pull-up resistor. 6 busy o busy. outputs a ?l? level during playback and a ?h? level when power is turned on. 7naro the cmd and st inputs become effective when high. nar indicates whether the address bus (10 through 16) is ready to accept another address. when high, it is ready to accept. nar goes high when power is turned on. 8aouto analog speech output. d/a converter output or lpf output is selected by entering the command. 11 xt i ceramic oscillator input. this pin has an internal 0.5 to 5 m ? feedback resistor between xt and xt . if an external clock is used, this is the clock input pin. 12 xt o ceramic oscillator output. if an external clock is used, leave this pin open. 13 cmd i command input and option control. this pin is used as command and option input when cmd is at the high level with st low. if this pin is not used or serial input is optioned, set this pin to ?h? level this pin has an internal pull up resistor. 14 st i start. speech playback starts at the fall of the st pulse. the 10-16 addresses are latched at the rise of the st pulse. input a st pulse when nar goes to the high level for channels 1 and 2. this pin has an internal pull-up resistor. 4 ch i channel control. channel 1 is selected when the input is pulled high. channel 2 is selected when the input is low. this pin has an internal pull-up resistor. 3l6/sdi this pin is command and user-defined phrase input when parallel input is optioned. this pin is serial data (command and address) input when serial input is optioned. 2i5/sii this pin is command and user-defined phrase input when parallel input is optioned. this pin is used as serial clock input when serial input is optioned. 1i4i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to ?l? level. this pin has an internal pull-down resistor. 18 i3/port1 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. 17 i2/port0 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. 15, 16 i0, i1 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to ?l? level. this pin has an internal pull-down resistor. 9 gnd ? ground pin. 10 v dd power supply. insert a 0.1 f ro more bypass capacitor between this pin and gnd.
fedl6650digest-05 oki semiconductor msm6650 family 29/46 2. msm66p54/p56-xx 20-pin plastic dip pin symbol type description 6 reset i reset. the devices enter stanby status when a low level is input to this pin. when reset, oscillation stops. the aout output goes to ground and the ic status is reinitialized this pin has an internal pull-up resistor. 7 busy o busy. outputs a ?l? level during playback and a ?h? level when power is turned on. 8naro the cmd and st inputs become effective when high. nar indicates whether the address bus (10 through 16) is ready to accept another address. when high, it is ready to accept. nar goes high when power is turned on. 9aouto analog speech output. d/a converter output or lpf output is selected by entering the command. 12 xt i ceramic oscillator input. this pin has an internal 0.5 to 5 m ? feedback resistor between xt and xt . if an external clock is used, this is the clock input pin. 13 xt o ceramic oscillator output. if an external clock is used, leave this pin open. 14 cmd i command input and option control. this pin is used as command and option input when cmd is at the high level with st low. if this pin is not used or serial input is optioned, set this pin to ?h? level. this pin has an internal pull-up resistor. 15 st i start. speech playback starts at the fall of the st pulse. the 10-16 addresses are latched at the rise of the st pulse. input a st pulse when nar goes to the high level for channels 1 and 2. this pin has an internal pull-up resistor. 5 ch i channel control. channel 1 is selected when the input is pulled high. channel 2 is selected when the input is low. this pin has an internal pull-up resistor. 4i6/sdi this pin is command and user-defined phrase input when parallel input is optioned. this pin is serial data (command and address) input when serial input is optioned. 3i5/sii this pin is command and user-defined phrase input when parallel input is optioned. this pin is used as serial clock input when serial input is optioned. 2i4i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to ?l? level. this pin has an internal pull-down resistor. 19 i3/port1 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. 18 i2/port0 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. 16, 17 i0, i1 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to ?l? level. this pin has an internal pull-down resistor. 10 gnd ? ground pin. 11 v dd ? power supply. insert a 0.1 f ro more bypass capacitor between this pin and gnd. 1v pp ? supply voltage for writing data to internal otp rom. 20 pgm i interface with voice analysis edit tools ar203 and ar204. set to ?l? level or leave open during playback. this pin has an internal pull-down resistor.
fedl6650digest-05 oki semiconductor msm6650 family 30/46 3. msm6652/53/54/55/56- xxx, msm6 652a/53a/54a/55a/56a/58a- xxx, msm66p54/p56-xx 24-pin plastic sop pin symbol type description 17 reset i reset. the devices enter stanby status when a low level is input to this pin. when reset, oscillation stops. the aout output goes to ground and the ic status is reinitialized this pin has an internal pull-up resistor. 20 busy o busy. outputs a ?l? level during playback and a ?h? level when power is turned on. 22 nar o the cmd and st inputs become effective when high. nar indicates whether the address bus (10 through 16) is ready to accept another address. when high, it is ready to accept. nar goes high when power is turned on. 23 aout o analog speech output. d/a converter output or lpf output is selected by entering the command. 2xti ceramic oscillator input. this pin has an internal 0.5 to 5 m ? feedback resistor between xt and xt . if an external clock is used, this is the clock input pin. 3 xt o ceramic oscillator output. if an external clock is used, leave this pin open. 5 cmd i command input and option control. this pin is used as command and option input when cmd is at the high level with st low. if this pin is not used or serial input is optioned, set this pin to ?h? level. this pin has an internal pull-up resistor. 8 st i start. speech playback starts at the fall of the st pulse. the 10-16 addresses are latched at the rise of the st pulse. input a st pulse when nar goes to the high level for channels 1 and 2. this pin has an internal pull-up resistor. 16 ch i channel control. channel 1 is selected when the input is pulled high. channel 2 is selected when the input is low. this pin has an internal pull-up resistor. 15 i6/sd i this pin is command and user-defined phrase input when parallel input is optioned. this pin is serial data (command and address) input when serial input is optioned. 14 i5/si i this pin is command and user-defined phrase input when parallel input is optioned. this pin is used as serial clock input when serial input is optioned. 13 i4 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to ?l? level. this pin has an internal pull-down resistor. 12 i3/port1 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. 11 i2/port0 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code.
fedl6650digest-05 oki semiconductor msm6650 family 31/46 pin symbol type description 9, 10 i0, i1 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to ?l? level. this pin has an internal pull-down resistor. 24 gnd ? ground pin. 1v dd ? power supply. insert a 0.1 f ro more bypass capacitor between this pin and gnd. 18 v pp * ? supply voltage for writing data to internal otp rom. 7 pgm *i interface with voice analysis edit tools ar761 and ar762. set to ?l? level or leave open during playback. this pin has an internal pull-down resistor. * pins for msm66p54/56-xx only
fedl6650digest-05 oki semiconductor msm6650 family 32/46 4. msm6650 64-pin plastic qfp (64-pin plastic sdip) pin symbol type description 29 (19) reset i reset. the devices enter stanby status when a low level is input to this pin. when reset, oscillation stops the aout output goes to ground and the ic status is reinitialized. this pin has an internal pull-up resistor. 3 (57) busy o busy. outputs a ?l? level during playback and a ?h? level when power is turned on. 4 (58) nar o the cmd and st inputs become effective when high. nar indicates whether the address bus (10 through 16) is ready to accept another address. when high, it is ready to accept. nar goes high when power is turned on. 5 (59) aout o analog speech output. d/a converter output or lpf output is selected by entering the command. 10 (64) xt i ceramic oscillator input. this pin has an internal 0.5 to 5 m ? feedback resistor between xt and xt . if an external clock is used, this is the clock input pin. 11 (1) xt o ceramic oscillator output. if an external clock is used, leave this pin open. 13 (3) cmd i command input and option control. this pin is used as command and option input when cmd is at the high level with st low. if this pin is not used or serial input is optioned, set this pin to ?h? level this pin has an internal pull up resistor. 14 (4) st i start. speech playback starts at the fall of the st pulse. the 10-16 addresses are latched at the rise of the st pulse. input a st pulse when nar goes to the high level for channels 1 and 2. this pin has an internal pull-up resistor. 28 (18) ch i channel control. channel 1 is selected when the input is pulled high. channel 2 is selected when the input is low. this pin has an internal pull-up resistor. 27 (17) l6/sd i this pin is command and user-defined phrase input when parallel input is optioned. this pin is serial data (command and address) input when serial input is optioned. 26 (16) i5/si i this pin is command and user-defined phrase input when parallel input is optioned. this pin is used as serial clock input when serial input is optioned. 25 (15) i4 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to ?l? level. this pin has an internal pull-down resistor. 24 (14) i3/port1 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. 23 (13) i2/port0 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. 21, 22 (11, 12) i0, i1 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to ?l? level. this pin has an internal pull-down resistor.
fedl6650digest-05 oki semiconductor msm6650 family 33/46 pin symbol type description 6 (60) agnd ? analog ground pin. 7 (61) dgnd ? digital ground pin. 8 (62) av dd ? analog power pin. insert a 0.1 f or more bypass capacitor between this pin and agnd. 9 (63) dv dd ? digital power pin. insert a 0.1 f or more bypass capacitor between this pin and dgnd. 12 (2) mck o main clock output pin. use mck as a connection pin for the msc1192, etc. when the ic is standby status, mck is held high. 16 (6) cpu i cpu mode. set to ?h? level to select microcontroller interface mode. 17 (7) serial i serial/parallel interface select. this input selects either the parallel or the serial input interface. the serial input interface is selected with a high level; the parallel input interface is selected with a low level. 30 (20) ce o chip enable. ce is a timing output pin to control read of external memory. this pin outputs when rcs is at the ?l? level. this pin outputs ?h? level when rcs is at the ?h? level. 31 (21) rcs i read chip select. the data bits d0-d7 are internally pulled down when rcs is high. addresses and ce are output when rcs is at ?l? level. the ra22-ra0 address pins become high impedance and ce pin outputs ?h? level when rcs is at the ?h? level. 32, 34- 40 (22, 24- 30) d0-d7 i external memory data bus. data is input when rcs is low. when rcs is high, these pins become low due to internal pull-down resistors. 41-63 (31-40, 42-54) ra0-ra22 o external memory address. these are address pins for an external memory output when rcs is low. these pins become high impedance status if rcs is in ?h? level. 15, 64 (5, 55) test1 , 2 i test. set these pins to ?h? level. 18 (8) ibusy o outputs a ?l? level during playback or when aout is at 1/2 v dd (except standby conversion) 20 (10) standby o outputs a ?l? level during which the device is oscillating.
fedl6650digest-05 oki semiconductor msm6650 family 34/46 absolute maximum ratings (gnd = 0 v) parameter symbol condition rating unit power supply voltage v dd ?0.3 to +7.0 v input voltage v in ta = 25c ?0.3 to v dd + 0.3 v storage temperature t stg ? ?55 to +150 c recommended operating conditions (gnd = 0 v) parameter symbol condition range unit msm6652-56, msm6650, msm6652a-56a 2.4 to 5.5 v power supply voltage v dd msm6658a, msm66p54/p56 3.5 to 5.5 v operating temperature t op ? ?40 to +85 c min. typ. max. master clock frequency f osc ? 3.5 4.096 4.5 mhz
fedl6650digest-05 oki semiconductor msm6650 family 35/46 electrical characteristics dc characteristics (v dd = 5.0 v, gnd = 0 v, ta = ?40 to +85c) parameter symbol condition min. typ. max. unit high level input voltage v ih ?4.2??v low level input voltage v il ???0.8v high level output voltage v oh l oh = ?1 ma 4.6 ? ? v low level output voltage v ol l ol = 2 ma ? ? 0.4 v high level input current 1 l ih1 v ih = v dd ??10 a high level input current 2 l ih2 internal pull-down resistor 30 90 200 a low level input current 1 l il1 v il = gnd ?10 ? ? a low level input current 2 *1 l il2 internal pull-up resistor ?200 ?90 ?30 a operating current i dd ??610ma ??10 a standby current l ds ta = ?40c to +50c ta = ?40c to +85c ??30 a d/a output relative accuracy |v dae | when d/a output selected ? ? 40 mv when d/a output selected *2 15 25 35 k ? d/a output impedance r dao when d/a output selected *3 15 30 45 k ? lpf driving resistance r aout when lpf output selected 50 ? ? k ? lpf output impedance r lpf l f = 100 a?13k ? *1. applied to reset , cmd , st , ch . *2. applied to msm6652/53/54/55/56, msm6652a/53a/54a/55a/56a/58a, msm6650. *3. applied to msm66p54/p56. dc characteristics (v dd = 3.1 v, gnd = 0 v, ta = ?40 to +85c) parameter symbol condition min. typ. max. unit high level input voltage v ih ?2.7??v low level input voltage v il ???0.5v high level output voltage v oh l oh = ?1 ma 2.6 ? ? v low level output voltage v ol l ol = 2 ma ? ? 0.4 v high level input current 1 l ih1 v ih = v dd ??10 a high level input current 2 l ih2 internal pull-down resistor 10 30 100 a low level input current 1 l il1 v il = gnd ?10 ? ? a low level input current 2 (note) l il2 internal pull-up resistor ?100 ?30 ?10 a operating current i dd ??47ma ?? 5 a standby current l ds ta = ?40c to +50c ta = ?40c to +85c ??20 a d/a output relative accuracy |v dae | when d/a output selected ? ? 20 mv d/a output impedance r dao when d/a output selected 15 25 35 k ? lpf driving resistance r aout when lpf output selected 50 ? ? k ? lpf output impedance r lpf l f = 100 a?13k ? note: applied to reset , cmd , st , ch .
fedl6650digest-05 oki semiconductor msm6650 family 36/46 application circuits (msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54/p56-xx) application circuit in serial input interface mode p1.0 p1.1 p1.2 p2.0 p3.0 reset msm83c154 ch cmd msm6652/53/54/55/56 msm6652a/53a/54a/55a/56a/58a msm66p54/p56 i6/sd i5/si st reset nar xt xt gnd v dd amp port0 port1 aout i4 i1 i0
fedl6650digest-05 oki semiconductor msm6650 family 37/46 (msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54/p56-xx) application circuit in parallel input interface mode p2.0 p3.1 p2.2 p2.1 p3.0 reset msm83c154 msm6652/53/54/55/56 msm6652a/53a/54a/55a/56a/58a msm66p54/p56 ch cmd st reset nar xt xt gnd v dd amp p1.6 i6 p1.0 i0 i5 i4 i3 i2 i1 p1.5 p1.4 p1.3 p1.2 p1.1 aout
fedl6650digest-05 oki semiconductor msm6650 family 38/46 (msm6650) application circuit in microcontroller interface mode using four 1-mbit eproms (serial input interface) i5/si ra16 ch xt i6/sd nar i0 msm6650 aout cmd i1 i4 rcs ra0 d7 d0 ce ra18 ra17 1b 1a v dd gnd v pp ce oe a16 a0 o7 o0 1y3 1y2 1y1 1y0 2g 1g 74hc139 msm27c101 p2.0 p1.0 p1.1 p1.2 p3.0 reset msm83c154 reset st test1 test2 cpu serial x t v dd gnd v pp ce oe a16 a0 o7 o0 msm27c101 v dd gnd v pp ce oe a16 a0 o7 o0 msm27c101 v dd gnd v pp ce oe a16 a0 o7 o0 msm27c101 av dd dv dd agnd dgnd
fedl6650digest-05 oki semiconductor msm6650 family 39/46 (msm6650) application circuit in microcontroller interface mode using four 1-mbit eproms (parallel input interface) v dd gnd v pp ce oe a16 a 0 o7 o0 msm27c101 v dd gnd v pp ce oe a16 a 0 o7 o0 msm27c101 v dd gnd v pp ce oe a16 a 0 o7 o0 msm27c101 v dd gnd v pp ce oe a16 a 0 o7 o0 msm27c101 1b 1a 1y3 1y2 1y0 2g 1g 74hc139 1y1 i5/si ra16 xt i6/sd msm6650 aout ra0 d7 d0 ra18 ra17 p2.0 p1.6 p1.5 p1.4 p1.3 reset msm83c154 reset xt av dd dv dd agnd dgnd p1.2 p1.1 p3.0 p2.1 p2.0 p3.1 p1.0 ce i3 i4 i1 i2 i0 nar cmd ch st rcs cpu test1 test2 serial
fedl6650digest-05 oki semiconductor msm6650 family 40/46 package dimensions (unit: mm)
fedl6650digest-05 oki semiconductor msm6650 family 41/46 notes for mounting the surface mount type package the surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact oki?s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). sop24-p-430-1.27-k mirror finish package material epoxy resin lead frame material 42 alloy pin treatment solder plating ( 5m) package weight (g) 0.58 typ. 5 rev. no./last revised 5/oct. 13, 1998 ( unit: mm )
fedl6650digest-05 oki semiconductor msm6650 family 42/46 dip20-p-300-2.54-w1 package material epoxy resin lead frame material 42 alloy pin treatment solder plating ( 5m) package weight (g) 1.50 typ. 5 rev. no./last revised 2/dec. 11, 1996 ( unit: mm )
fedl6650digest-05 oki semiconductor msm6650 family 43/46 notes for mounting the surface mount type package the surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact oki?s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). ( unit: mm )
fedl6650digest-05 oki semiconductor msm6650 family 44/46 sdip64-p-750-1.778 package material epoxy resin lead frame material cu alloy pin treatment solder plating ( 5m) package weight (g) 8.70 typ. 5 rev. no./last revised 2/dec. 11, 1996 ( unit: mm )
fedl6650digest-05 oki semiconductor msm6650 family 45/46 revision history page document no. date previous edition current edition description fedl6650digest-04 jul. 2000 ? ? edition 4 14 14 fedl6650digest-05 jan. 11, 2002 33 33 modified descriptions of cs and rcs .
fedl6650digest-05 oki semiconductor msm6650 family 46/46 notice 1. the information contained herein can change without notice owing to product and/or technical improvements. before using the product, please make sure that the information being referred to is up-to-date. 2. the outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. when planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. when designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. neither indemnity against nor license of a third party?s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. no responsibility is assumed by us for any infringement of a third party?s right which may result from the use thereof. 6. the products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). these products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. certain products in this document may need government approval before they can be exported to particular countries. the purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. no part of the contents contained herein may be reprinted or reproduced without our prior permission. copyright 2002 oki electric industry co., ltd.

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